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REFERENCE DESIGN
Overview
IRDCIP1201-A
International Rectifier * 233 Kansas Street, El Segundo, CA 90245 USA
IRDCIP1201-A, 300kHz, Dual 15A, 3.14VIN to 5.5VIN Dual Output Synchronous Buck Converter using iP1201
The iP1201 is fully optimized solution for medium current synchronous buck applications requiring up to 15A or 30A. In this document, Fig. 1, 2, 3 and 4 are provided to enable engineers to easily evaluate the iP1201 in an independent and parallel configuration that is capable of providing up to 15A per phase with double-sided heat sinking. Fig. 6, 7 and 8 and the complete bill of materials in Table 1 are provided as a reference design to enable engineers to very quickly and easily design a dual phase converter. In order to optimize this design to your specific requirements, refer to the iP1201 data sheet for guidelines on external component selection and user adjustable limits and specifications. Custom designs may require layout modifications.
Demoboard Quick Start Guide
Initial Settings:
* * * * * *
Procedure for Connecting and Powering Up Demoboard:
1. 2. 3. 4. 5. 6. 7.
The output1 is set to 1.5V and output2 is set to 2.5V for independent configuration. The output1 is set to 1.5V with R8, R10, R11 and R12 removed for parallel configuration. Output can be adjusted from 0.8V to 3.3V as follow: 1. VOUT1: R9=R13= R7 [(VOUT 1/ Vref) - 1]. Set R7=R14=1k,Vref=0.8V 2. VOUT2: R10=R11= R8 [(VOUT2 / Vref) - 1]. Set R8=R12=1k,Vref=0.8V. The switching frequency is set to R3=30.9k for 300kHZ The input voltage range can be increased to allow operation between 3.14VIN and 5.5VIN. For paralleled single output operation see Fig. 6 for configuration table in reference design schematic.
IRDCIP1201-A Recommended Operating Conditions
(refer to the iP1201 datasheet for maximum operating conditions)
Connected JP2 for VIN < 3.5V. Disconnected JP2 for VIN > 3.5V. Make sure JP3 is connected Apply input voltage (3.14V-5.5V) across VIN and PGND Apply load across VOUT1 pad and PGND pad and VOUT2 pad and PGND pad for independent configuration. Apply load across VOUT1 pad and PGND pad and short R23 for parallel configuration. Adjust load accordingly.
3.14 - 5.5V Can be set between 0.8V - 3.3V, up to 90% max duty cycle. Up to 15A (see recommended operating area Fig. 1, 2 and 3). The maximum current should be limited to 11.5A if the PCB is the only heat sink. Switching Freq: 200kHz to 400kHz selectable. 08/18/03
Input voltage: Output voltage: Output current:
IRDCIP1201-A
16 14
16 14
VI N =3.3V
VI N =5.0V
Load Current (A)
12
Load Current (A)
12 10
10 8 6 4 2
VI N =3.3V
8 6 4 2
VI N =5.0V
f SW =200k Hz
0 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4
0 0.8
f SW =300k Hz
1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4
Output V oltage (V )
Output Voltage (V )
Fig. 1: Recommended Operating Area 200kHz
16 14 12 10 8 6 4 2 f SW =400kHz 0
0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2
Fig. 2: Recommended Operating Area 300kHz
VI N =3.3V
VI N = 5V
Load Current (A)
Output V oltage (V )
Fig. 3: Recommended Operating Area 400kHz
400
Switching Frequency in KHz
380 360 340 320 300 280 260 240 220 200 20 25 30 35 40 45 50
R T in KOhms
2
Fig. 4 : Per Channel Switching Frequency vs RT
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IRDCIP1201-A
95% 94% 93% 92% 91%
V IN = 5V, V OUT1 = 1.5V, V OUT2 = 2.5V
Efficiency
90% 89% 88% 87% 86% 85% 84% 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
200kHz 300kHz 400kHz
Output Current(A)
Fig. 5 - Typical Efficiency vs. Current For output current greater than 11A per channel, PCB and device case temperature will need to remain within the SOA of the iP1201. See iP1201 datasheet and AN-1047. Refer to the following application notes for detailed guidelines and suggestions when implementing iPOWIR Technology products: AN-1028: Recommended Design, Integration and Rework Guidelines for International Rectifier's iPOWIR Technology BGA Packages This paper discusses the assembly considerations that need to be taken when mounting iPOWIR BGA's on printed circuit boards. This includes soldering, pick and place, reflow, inspection, cleaning and reworking recommendations. AN-1029: Optimizing a PCB Layout for an iPOWIR Technology Design This paper describes how to optimize the PCB layout design for both thermal and electrical performance. This includes placement, routing, and via interconnect suggestions. AN-1030: Applying iPOWIR Products in Your Thermal Environment This paper explains how to use the Power Loss and SOA curves in the data sheet to validate if the operating conditions and thermal environment are within the Safe Operating Area of the iPOWIR product. AN-1047: Graphical solution to two branch heatsinking Safe Operating Area This paper is a suppliment to AN-1030 and explains how to use the double side Power Loss and SOA curves in the data sheet to validate if the operating conditions and thermal environment are within the Safe Operating Area of the iPOWIR product. www.irf.com 3
B
A
VSW1S
PG NDS
1
2
1
2
R1 0
Installed
Re moved
SYNC
PGND
4
JP2-1 JP3-1
JP1-1
*For Vin < 3.5V, short A & B through JP2 jumper. *For Vin > 3.5V, remove jumper JP2.
B
1 2
TP3 C18 1uF (Optional)
VS W1S
SHUNT JP2 * A/B
VIN VS W1
SHUNT
SHUNT
A
VIN TP1 VIN VSW1 1.0uH FB1 887 1%
6.3 V 6.3 V
TP28 VIN TP8 VSW1 L1 R15
VO UT1 (1.5V)
TP15 VOUT1 TP11 VOUT1 TP20 C14 0.1uF VOUT1 TP14 PGND TP16 PGND C12 470uF C13 470uF C25 NI
VIN VIN=3.14V-5.5V C2 100uF 6.3V
FB 1
TP2 R9**
C1 100uF 6.3V 5mOHM (short f independent or output configuration)
C3 100uF 6.3V
C4 100uF 6.3V
C5 100uF 6.3V
C6 100uF 6.3V
PGND R26 NI NI R7** 1K 1% C9 0.01uF R5 4.75K R25 C21 NI
TP4 C22 NI ENABLE
HICCUP CC1
TP29 PGND
IRDCIP1201-A
PGND VIN 100K CC1 JP1 HICCUP
FB 1S
CON4 R1 HICCUP
1
2
VINS
3
4
TP22 PGND
5
6
VSW1S
FB1S 887 1% C19 100pF R14 1K 1% R16 0 R4 0
R13
7
8
VSW2S
9
10
VO UT1 PG OOD VP -REF
VIN PGOOD VP-REF 100K
R2
11
12
VO UT2
13
14
R23 0
15
16
SS1
SS1 VR EF
VREF C10 100pF
VS W2S
0.8V
INPUT/OUTPUT C8 0.1uF
VS W2S
iP1201
TY III PE Compensation
Typ III C e onfiguratio n
Compensation Configuration
SS2
SS2 VS W2 Installed Installed Installed
TP17 VOUT2 L2 1.0uH R19
VO UT2
De signa tor
Typ II Configuratio e n
TP10 VSW2 VSW2
(2.5V)
5mOHM or R17 (short f independent 0 output configuration)
TP13 VOUT2 C15 470uF R10
6.3 V
R2 R2 R2 R28 5, 6, 7,
Re moved
C2 C2 1, 3
Re moved
C7 0.1uF VIN
FB 2
C2 C2 2, 4 Installed
Re moved
C9 C11 ,
Installed
FB2 R27 NI R6 7.15k C11 6800pF FB1S R22 0 R8 1k 1%
C16 470uF
6.3 V
C26 NI 2.15k 1%
C17 0.1uF TP12 C23 NI TP18 PGND PGND
R5 R6 ,
Installed
Re moved
R24 100K ENABLE
ENABLE
Fig. 6 - Reference Design Schematic
C24 NI R28 NI JP3 ENABLE
CC2
CC2
2p hasemode (single outp ut) 5m OHM
Output Configuration
De signa tor
Ind epend m ent ode(d o ual utput)
R1 R1 5, 9
Sho rt
R3 RT
RT FB 2S
FB2S
R11 2.15K 1% C20 100pF R12 1K 1%
R1 6
Re moved
Installed
30.9K TP6 SYNC
SYNC
R1 7 Re moved
Re moved
Installed
**For independent mode, output voltages are set by using the following equations: For V OUT1: R9 = R7[(VOUT1/V REF) - 1]. For V OUT2: R10 = R8[(V OUT2/VREF) - 1]. Set R7 (or R8) to 1K, V REF to 0.8V, and VOUT to desired output, then solve for R9 (or R10 respectively). For parallel (single output) mode, check table on the left.
R8
Installed
R4 Re moved Installed Installed (Shorted)
Installed
Re moved
R1 R12 1
Installed
R2 2
Re moved
R2 3
Re moved
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IRDCIP1201-A
Fig. 7 - Component Placement (Top View) SideLayer
Fig. 8 - Component Placement (Bottom View) www.irf.com 5
IRDCIP1201-A
IRDCIP1201-A (Dual, Independent output configurations(Channel1 1.5V output, Channel2 2.5V output)
QTY 6 3 1 4 4 1 14 1 2 3 2 4 2 2 1 1 1 1 1 REF DESIGNATOR C1, C2, C3, C4, C5, C6 C10, C19,C20 C11 C12, C13, C15, C16 C14, C17, C7, C8 C18 C21, C22, C23, C24, C25, C26, R16, R17, R22, R23, R25, R26, R27, R28 C9 L1, L2 R1, R2, R24 R10, R11 R12, R14, R7, R8 R13, R9 R15, R19 R3 R4 R5 R6 U1 DESCRIPTION Capacitor, ceramic, 100F, 6.3V, X5R, 20% Capacitor, ceramic, 100pF, 50V, NPO, 5% Capacitor, ceramic, 6800pF, 50V, X7R, 10% Capacitor, poscap, 470F, 6.3V, electrolytic 20% Capacitor, ceramic, 0.1F, 16V, X7R, 10% Capacitor, ceramic, 1.00F, 16V, X7R, 10% Not installed Capacitor, ceramic, 0.01F, 50V, X7R, 10% Inductor, 1H, 19A, 20% Resistor, thick film, 100k, 1/10W, 1% Resistor, thick film, 2.15k, 1/10W, 1% Resistor, thick film, 1.0k, 1/10W, 1% Resistor, thick film, 887, 1/10W, 1% Resistor, manganin-foil, 0, 2W Resistor, thick film, 30.9k, 1/10W, 1% Resistor, thick film, 0, 1/10W Resistor, thick film, 4.75k, 1/10W, 1% Resistor, thick film, 7.15k, 1/10W, 1% BGA Power Block SIZE 1812 0603 0603 7343 0603 0805 0603 13.0mm X 12.9mm 0603 0603 0603 0603 2716 0603 0603 0603 0603 9.25mm X 15.5mm MFR TDK Phycomp KOA Sanyo Murata Murata Samsung Panasonic KOA KOA KOA KOA Isotek Corp KOA ROHM KOA KOA IR PART NUMBER C4532X5R0J107M 0603CG101J9B20 X7R0603HTTD682K 6TPB470M GRM188R71C104KA01D GRM40X7R105K016 CL10B103KBNC ETQP1H1R0BFA RK73H1J1003F RK73H1J2151F RK73H1J1001F RK73H1J8870F SMT-R000 RK73H1J3092F MCR03EZHJ000 RK73H1JLTD4751F RK73H1JLTD7151F iP1201
IRDCIP1201-A (Single, paralleled output configuration(for 1.5V output)
QTY 6 3 1 4 4 1 15 1 2 3 2 2 2 1 1 3 1 1 1 REF DESIGNATOR C1, C2, C3, C4, C5, C6 C10, C19,C20 C11 C12, C13, C15, C16 C14, C17, C7, C8 C18 C21, C22, C23, C24, C25, C26, R10, R11, R12, R25, R26, R27, R28, R4, R8 C9 L1, L2 R1, R2, R24 R14, R7 R13, R9 R15, R19 R23 R3 R16, R17, R22 R5 R6 U1 DESCRIPTION Capacitor, ceramic, 100F, 6.3V, X5R, 20% Capacitor, ceramic, 100pF, 50V, NPO, 5% Capacitor, ceramic, 6800pF, 50V, X7R, 10% Capacitor, poscap, 470F, 6.3V, electrolytic 20% Capacitor, ceramic, 0.1F, 16V, X7R, 10% Capacitor, ceramic, 1.00F, 16V, X7R, 10% Not installed Capacitor, ceramic, 0.01F, 50V, X7R, 10% Inductor, 1H, 19A, 20% Resistor, thick film, 100k, 1/10W, 1% Resistor, thick film, 1.0k, 1/10W, 1% Resistor, thick film, 887, 1/10W, 1% Resistor, alloy metal, 5m, 1W, 1% Resistor, manganin-foil, 0, 2W Resistor, thick film, 30.9k, 1/10W, 1% Resistor, thick film, 0, 1/10W Resistor, thick film, 4.75k, 1/10W, 1% Resistor, thick film, 7.15k, 1/10W, 1% BGA Power Block SIZE 1812 0603 0603 7343 0603 0805 0603 13.0mm X 12.9mm 0603 0603 0603 2512 2716 0603 0603 0603 0603 9.25mm X 15.5mm MFR TDK Phycomp KOA Sanyo Murata Murata Samsung Panasonic KOA KOA KOA Panasonic Isotek Corp KOA ROHM KOA KOA IR PART NUMBER C4532X5R0J107M 0603CG101J9B20 X7R0603HTTD682K 6TPB470M GRM188R71C104KA01D GRM40X7R105K016 CL10B103KBNC ETQP1H1R0BFA RK73H1J1003F RK73H1J1001F RK73H1J8870F ERJM1WSF5M0U SMT-R000 RK73H1J3092F MCR03EZHJ000 RK73H1JLTD4751F RK73H1JLTD7151F iP1201
Table 1 - Reference Design Bill of Materials
Use of this design for any application should be fully verified by the customer. International Rectifier cannot guarantee suitability for your applications, and is not liable for any result of usage for such applications including, without limitation, personal or property damage or violation of third party intellectual property rights. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: ++ 1 310 252 7105 Technical Assistance Center (TAC) Fax : ++ 1 310 252 7903
6
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